In a recent round table discussion hosted by Wipro Engineering Edge, esteemed leaders from Wipro's VLSI and System Design Practice came together to delve into the transformative power of Artificial Intelligence (AI) in the VLSI industry. Led by the insightful moderation of Ritesh Tyagi, Global Head of VLSI and SD Practice, the panelists – including Narendra Nande, Atul Dwivedi, Mohit Bansal, Resty Roy, and other industry experts – engaged in an illuminating conversation. They deep dived into the challenges, implications, and potential of implementing AI in critical areas of VLSI. From addressing the ever-increasing chip complexity to meeting market pressures, this dynamic session covered it all. Stay tuned as these experts unravel the AI-driven future of VLSI and System Design!

Q: Ritesh Tyagi: How is Generative AI impacting VLSI and chip design amidst growing complexity and market pressures?

Atul Dwivedi

Function Head, Wipro Engineering Edge

Generative AI holds the promise of reducing cycle time and turnaround time, which have long been major bottlenecks for us.

Narendra Nande: At Wipro, we've witnessed firsthand the transformative power of Generative AI in VLSI. It has significantly reduced debug and analysis time for one of our projects, from days to mere hours. But it doesn't stop there – Generative AI is also enhancing semiconductor board bring-up activities. Its efficiency, quick results, and potential for improved reliability over time are game-changers. Electronic Design Automation (EDA) companies are also leveraging Generative AI to generate different combinations and permutations of test sequences, creating corner and stress scenarios. Additionally, the use of Natural Language Processing in prompt engineering has accelerated code log analysis, improving the overall development cycle.

Atul Dwivedi: Generative AI holds the promise of reducing cycle time and turnaround time, which have long been major bottlenecks for us. By harnessing the power of GenAI, we can streamline Turnaround Time (TAT) and Process Performance Analysis (PPA) in Design Implementation, resulting in faster and more optimized designs. For instance, in floor planning, AI can suggest unconventional approaches, such as placing macros at the center instead of the periphery, leading to improved results and quality. Even if it deviates from traditional practices, Generative AI can provide better outcomes.

Q: Ritesh: What are the challenges and implications of implementing AI in VLSI, particularly in DFT, DV, and Analog? How is the industry addressing them?

Dr. Vijay Kumar K

DMTS - Distinguished Member, Wipro Engineering Edge

When it comes to AI in VLSI, we face two major challenges: unclear customer demands and building competency.

Mohit Bansal: Implementing AI in Design for Testability (DFT) poses challenges due to the increasing complexity of AI/ML chips. To avoid yield loss, proper testing and DFT architecture are crucial. Gen AI tackles this challenge by dividing designs into smaller blocks and implementing clock circuits to control power consumption during testing. AI and ML are also transforming Design Verification (DV) by optimizing test cases, automating verification, and improving efficiency. With AI and ML, we can shorten the verification cycle, enhance test case accuracy and coverage, and improve overall effectiveness. Despite the challenges, the benefits of AI and ML make them worth exploring.


Dr. Vijay: Implementing AI in Analog design for VLSI presents challenges in ensuring robustness and reliability. To address these challenges, the industry needs to transform architecture, narrow down scenarios, and invest in advanced CAD tools and simulators. When it comes to AI in VLSI, we face two major challenges: unclear customer demands and building competency. To overcome these, we need to focus on awareness-building, provide on-the-go training, and create measurable metrics.

Q: Ritesh: What are some tangible benefits of Generative AI in VLSI?         

Atul: Generative AI is being utilized in various areas of VLSI to optimize processes and improve efficiency. It is used for code generation, unit testing, and debug and analysis. Additionally, it has implications in physical design, where it can lower Turnaround Time (TAT) and decrease the Power Performance Area (PPA). In DFT, Generative AI helps address the challenges posed by complex AI/ML chips, such as yield loss and accommodating all vectors in a small test area. Analog design can also benefit from AI implementation, making it more robust and increasing bandwidth. In Design Verification, AI can automate routine tasks and improve the efficiency of the verification process. Overall, Generative AI is transforming VLSI by streamlining processes and delivering high-quality solutions.

Q: Ritesh: What are the concerns about job displacement caused by the rise of AI? How will the relevance of generative AI skill sets affect future customer interactions and job profiles?

Resty Roy: It's important to remember that technology has always evolved and transformed the way we work. Just like the advent of mobile phones replaced landlines, new technologies will continue to emerge. However, throughout history, jobs have not disappeared but rather evolved and upskilled alongside technological advancements. Upskilling and continuous learning are powerful tools. The relevance of generative AI skill sets will shape future customer interactions and job profiles. Differentiation lies in processor configuration, performance, interface requirements, and technology. Skill enablement is crucial for design, verification, DFT, PD, and analog perspectives. By embracing new technologies, we can adapt to the changing times and ensure that our workforce remains valuable and competitive in the AI-driven era.

Q: Ritesh: What are the best practices for AI implementation? How can we ensure the reliable and effective utilization of generative AI in safety-critical applications like automotive, medical, defense, and military?

Narendra: Ensuring reliability in AI predictions is crucial. Best practices include using the 5x9 reliability model for Platform Software and the 26262 model for enhanced reliability in DFT. These practices emphasize measurable metrics and industry-specific frameworks for robust AI implementations. To make generative AI more reliable, we need to adopt a back-to-basics approach. This involves breaking down reliability into measurable metrics and continuously improving them. By prioritizing reliability, adhering to safety standards, and continuously scrutinizing fault and pattern coverages, we can ensure reliable assets and effective implementation in generative AI applications.

Narendra Nande

Practice Director, Wipro Engineering Edge

To make generative AI more reliable, we need to adopt a back-to-basics approach. This involves breaking down reliability into measurable metrics and continuously improving them.

In safety-critical applications like automotive, medical, defense, and military, the utilization of generative AI requires stringent measures. It is essential to follow industry-specific safety standards and regulations. Rigorous testing and validation processes are crucial to ensure the reliability and effectiveness of generative AI in these applications. Additionally, continuous monitoring and updating of AI models and algorithms are necessary to adapt to evolving safety requirements. Collaboration between industry experts, regulatory bodies, and technology providers is vital to establish guidelines and best practices for the reliable and effective utilization of generative AI in safety-critical applications. By working together, we can ensure that the benefits of generative AI are harnessed while maintaining the highest levels of safety and reliability.

Wipro is at the forefront of leveraging generative AI to drive innovation and deliver high-quality solutions in the VLSI industry. To learn more about Wipro Engineering services and how we use AI to enable our clients to realize their technology and business ambitions, please visit our engineering page and email us on info@wipro.com.